Netlist driven layout with LVS
Beside the usage of the integrated schematic the LayoutEditor can read netlists from many popular programs. It supports formats like Spice, Pads-pcb, qucs or Alliance format. The correct operation had been test with several programs like LT-Spice, DesignWorks or QUCS. The LayoutEditor works with both flat and hierarchical netlists. Also a combinated design PCB and LTCC, SAW, thin film, COB, ... is possible.
Setting up the Library
Schematic and netlist consists of devices, information how they are connected and some other information which are mostly not relevant to design the physical layout. A device can be a simple resistor, transistor or a complex subcircuit which may contains of a plenty of other devices. The principle of the LayoutEditor helping you with the design is that for each device there exists a cell which its design. So if you have a netlist with a subcircuit you have at first to design the subcircuit. The name of circuits/subcircuits must be identical to the associated cell to be recognized by the LayoutEditor. To use existing cells/design a connecting from the device had to be made. These connection are defined in libraries which had to be set up. Different library formats can be used with the LayoutEditor. (see Add Netlist Library for details) Parameter cell and scalable cell can be used via macros.
Setting up the Technology/Layers
To assist and test the connectivity some information on the connecting layers are required. Enter all connecting layers and associated via layers to the technology list and sort them in the correct order. The setup display on the right will represent a technology as displayed on the left. The lowest display layer is the "poly" layer followed by the "Cont_poly" layer and so on. The library and technology setup will be saved on program exit and restored on program start. Also the setup can be saved via the Generate Technology Macro function.
Loading the Netlist
After the setup the netlist/schematic can be loaded. The netlist will be used for the current active cell. If subcells are available they will be used for cell with the same name. The connection between cells and devices will be made during the netlist load. If you setup the libraries after the netlist load use the Rebuild Library/Netlist function to rebuild the connections.
Placing the Cells
With the loading of the netlist all devices will be listed in the device list. The symbol next to the device show, whether the device was found in a library and wether it is already placed in the current cell. By clicking on a device you can placed that device in the cell. The connection of existing cells will be displayed. After placing a device/cell reference the next device will be selected, which has the most connections to already placed devices. But you can choose an other device, if you prefer that.
Routing the Connections
After placing some cells or all cells the routing had to be done. To assist with the routing click on the node you want to route. The required connecting will be shown. By double clicking on the node you can mark which nodes are finished and where there may be a routing problem. The Route Mode may also assist you with the labeling of the nodes.Also a automatic alignment to the minimal design rules is possible.
LVS and Debugging
After completing the placing and routing you can check and debug the result. The Build Connections function will check how the devices/cell references are connected. The results can be analyzed in different way: You can highlight connected elements (see Node Mode), save the resulting netlist (see Save Extracted Netlist) and use an external LVS or you can use the build in LVS (see LVS function). If you use the internal LVS all detected errors will be show in a list. By clicking on this list the problem will be highlighted in the drawing. (for some errors click multiply time on one item to show all informations) Also the node list will display/mark nodes which have problems.