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LEL (LayoutEditor Library)

LEL is the native file format of the LayoutEditor to store components including its symbols and all other informations required to perform a schematic driven layout.

Using LEL in the LayoutEditor

As LayoutEditor Library is the native format the usage is very simple. Just open the library with AddLibrary and the library will be added to the list of opened libraries. Any modifications to the library can be made within the SchematicEditor.

Description of the LEL File Format

The LayoutEditor Library is a text format in XML style. It contains a collection of component entries. Any text outside an component entry is ignored. Special chars in names are replaced by its html characters. e.g. space is replaced by &sp;

Example:

<Component componentname1>
 ...
</Component>

<Component component&sp;name2>
 ...
</Component>

General Description

In the general part of a component thing like devicename prefix, parameters and a user description is included.

Example:

<Component componentname>
<Description>
your descrition of the component. You may also use a http link.
</Description>
<Parameter>
<string name default>
<list listname option1 option2 option3 option4>
</Parameter>
<Prefix N>
 ...
</Component>

Symbol Description

A symbol, the label of the component and its position is described here.

Example:

<Component componentname>
 ...
<Label>
$devicename
$value
</Label>
<Symbol>
<Line 0 -44 32 -44 wire>
<Line 0 -20 32 -20 wire>
<Line 32 -20 16 -44 wire>
<Line 0 -20 16 -44 wire>
<Line 16 0 16 -20 wire>
<Line 16 -44 16 -64 wire>
<Port 16 0 +>
<Port 16 -64 ->
</Symbol>
<Offsetlabel 0 24 0>
 ...
</Component>

Layout Information

The linkage to a layout is described here.

Example:

<Component componentname>
 ...
<Layout>
[macro]
# device-type   macro-file              pins
*               pcb/capacitor.layout    pin1 pin2
</Layout>
 ...
</Component>

Simulation

To do simulation with the component also netlist relevant information is stored. Each supported netlist format may have its own Netlist and Model entry. Here is an example with just a spice simulation information.

Example:

<Component componentname>
 ...
<Netlist spice>
X$devicename $node(in+) $node(in-) $node(gate) IC_xxx
</Netlist>
<Model spice>
.SUBCKT IC_xxx 3 1 2 
* INPUT
RC1 1 2 7895
RC2 2 3 6631
.ENDS IC_xxx
</Model>
</Component>

Example

So a complete component in a library may look like this:

<Component pmos4>
<Description>
P-Channel
</Description>
<Parameter>
<string value PMOS>
</Parameter>
<Layout>
</Layout>
<Prefix MP>
<Label>
$devicename
$value
</Label>
<Symbol>
<Line 48 -80 48 -96 wire>
<Line 16 -80 48 -80 wire>
<Line 16 -48 24 -48 wire>
<Line 48 -48 24 -44 wire>
<Line 48 -48 24 -52 wire>
<Line 24 -44 24 -52 wire>
<Line 16 -8 16 -24 wire>
<Line 16 -40 16 -56 wire>
<Line 16 -72 16 -88 wire>
<Line 0 -80 8 -80 wire>
<Line 8 -16 8 -80 wire>
<Line 48 -16 16 -16 wire>
<Line 48 0 48 -16 wire>
<Port 48 0 D>
<Port 0 -80 G>
<Port 48 -96 S>
<Port 48 -48 B>
</Symbol>
<Offsetlabel 0 56 -32>
<Netlist spice>
M§$devicename $node(D) $node(G) $node(S) $node(B) $value
</Netlist>
</Component>

See also


CategoryFileFormat CategoryFileFormatSchematic


LEL (last edited 2014-09-21 15:39:20 by JürgenThies)